1. Field of the Invention
This invention relates to a hybrid circuit device wherein a delay line circuit is externally connected to an integrated circuit.
2. Description of the Prior Art
It is the recent trend that most electronic circuits are provided in the form of an integrated circuit. However, difficulties have been experienced in fabricating, in the form of an integrated circuit, an inductance containing circuit such as a delay line circuit which consists of a combination of coils and capacitors, for example. Thus, in the case of a circuit device including an integrated circuit and an element or elements which are difficult to provide in the form of an integrated circuit, it is required that such elements be externally connected to the integrated circuit. Such requirement also arises when a delay line is to be connected to a saturation type logical circuit such as TTL or the like.
Referring to FIG. 1 of the accompanying drawings, there is shown a circuit diagram of a conventional hybrid circuit device constituting a buffered delay line circuit, wherein the portion enclosed by the dotted line DL includes a plurality of coils L and capacitors C which constitute a delay line circuit. Six TTL elements G1-G6 are connected to the delay line circuit DL. These elements are provided in the form of an integrated circuit and incorporated in a flat package as enclosed by an alternate long and short dash line F in FIG. 10 of the accompanying drawings as will be explained hereinafter. In FIG. 1, an input terminal t1 is connected to the TTL element G1, and output terminals t2-t6 are led out of the TTL elements G1-G6 respectively. Indicated by Vc is a power source terminal, and denoted by E is a ground terminal.
FIG. 2 is a perspective view of the conventional constituting the circuit arrangement shown in FIG. 1 such as disclosed in U.S. patent application Ser. No. 448,630 filed Dec. 10, 1982, now Pat. No. 4,506,238 issued Mar. 19, 1985. As will be seen from FIG. 2, the conventional hybrid circuit device includes a plastic base plate 1 supporting a delay line circuit DL which comprises a plurality of coils L and capacitors C; and a flat package 2 which incorporates TTL elements G1-G6 provided in the form of an integrated circuit, wherein the base plate 1 is disposed on the flat package 2 to form a superimposed assembly which is encapsulated with plastic material in the form of a dual in-line package (referred to as DIP hereinafter) as shown by a broken line 3.
The flat package 2 has two different types of terminals 4A and 4B horizontally led out of the opposite sides thereof. The non-bent terminals 4A are cut short, whereas the remaining terminals 4B are not cut short but bent upwardly and fitted in grooves 5 formed in the side portions of the base plate 1. The terminals 4B are electrically connected to the delay line circuit DL through conductor patterns provided on the base plate 1.
The DIP 3 is provided with two rows of separate external terminals 6A and 6B which are greater in width than the terminals 4A and 4B of the flat package 2, the terminals 6A being connected to the non-bent terminals 4A of the flat package 2. As shown in FIG. 2, each of the external terminals 6A comprises an upwardly-bent end portion formed with a recess 8; a horizontal or lateral portion 7; and a downwardly-bent end portion. The upwardly-bent end portion and horizontal portion 7 of each of the terminals 6A are embedded in the encapsulation of the DIP 3, while the downwardly-bent end portion thereof is exposed through the encapsulation. The non-bent terminals 4A of the flat package 2 are disposed in engagement with the recesses 8, respectively. Attached to the base plate 1 are the external terminals 6B, each of which comprises an upwardly-bent end portion 201; a horizontal or lateral portion 9; and a downwardly-bent end portion. The upwardly-bent end portion of each of the terminals 6B is provided at the upper free end thereof with a narrow portion 10 (FIG. 2) which is substantially equal in width to the terminals 4A and 4B. The narrow portions 10 are fitted in the grooves 5 formed in the side portions of the base plate 1, and electrically connected to the delay line circuit DL. The narrow portion 10, upwardly-bent end portion and horizontal portion 9 of each of the terminals 6B are embedded in the encapsulation of the DIP 3, while the downwardly-bent end portion thereof is exposed through the encapsulation, as will also be seen from FIG. 3.
With the above-described conventional hybrid circuit device, it is required that the horizontal portions 7 and 9 of the external terminals 6A and 6B be alinged in a common horizontal plane (indicated by X1 in FIG. 3), and as will be seen from FIG. 3, the horizontal plane X1 is located at a lower level than a horizontal plane X2 in which the terminals 4A and 4B of the flat package 2 are aligned. Furthermore, it is also required that a substantial space be secured above the base plate 1 since the coils L and capacitors C constituting the delay line circuit DL are supported on the base plate 1. Thus, the position where the external terminals 6A and 6B are exposed through the encapsulation of the DIP 3, i.e., the position of the horizontal plane X1 in which the terminals 6A and 6B are aligned, inevitably becomes substantially closer to the bottom surface than to the top surface of the DIP 3, i.e., substantially lower than the position equidistant from the top and bottom surfaces of the DIP 3. A mold which can be employed for molding the encapsulation of the DIP 3 comprises upper and lower mold halves which are separable at the position corresponding to the horizontal portions 7 and 9 of the external terminals 6A and 6B; the mold cavity of the upper mold half is substantially deeper than that of the lower mold half since the position of the horizontal plane X1 in which the horizontal portions 7 and 9 of the terminals 6A and 6B are aligned, is substantially closer to the bottom surface than to the top surface of the DIP 3, that is, the position of the horizontal plane X1 is not equidistant from the top and bottom surfaces of the DIP 3, as mentioned above. Obviously, this makes it difficult to remove the molded article from the mold cavity of the upper mold half after the molding operation is over. It is the usual practice that a number of such DIP's 3 are molded at one time by using a common mold comprising upper and lower mold halves; thus, if any of the molded articles remains unremoved from the mold even after the molding operation is over, such molded article tends to become flawed. It also tends to happen that the external terminals 6A and 6B are unintentionally bent. Thus, the molding operation tends to result in a poor yield.
It is the usual practice that hybrid circuit devices of the aforementioned type are manufactured on the basis of orders received; thus, such devices are subject to various modifications, as required by customers, in terms of disposition of the conductor patterns and LC elements on the base plate 1, positions where the delay line circuit DL and the integrated circuits incorporated in the flat package 2 are to be connected together by the terminals 4A, positions where the external terminals 6A and 6B are to be attached to the base plate 1, etc. With the foregoing conventional type of hybrid circuit device, however, such modifications are very difficult to achieve for the following reasons:
(1) It is usual that the external terminals 6A and 6B are formed by using a lead frame, and the pitch thereof is predetermined.
(2) The pitch of the terminals 4A and 4B of the flat package 2 is also predetermined, and it is smaller than the pitch of the external terminals 6A and 6B. For instance, the terminal pitch of DIP provided with 14-pin external terminals is 2.54 mm, and the standard terminal pitch of a flat package provided with 14-pin external terminals is 1.27 mm. Thus, there occur positions where the terminals 4B overlap and contact the external terminals 6B attached to the base plate 1, and no external terminals 6B can be provided at such positions. For this reason, limitation is laid upon the positions where the external terminals 6B can be provided.
(3) The circuits incorporated in the flat package 2 are provided in the form of an integrated circuit; hence, it is not possible to modify the circuit arrangement. Furthermore, the roles of the terminals are predetermined in accordance with their positions. Thus, with the foregoing conventional hybrid circuit device, incovenience has been experienced in that only a limited degree of freedom is provided in terms of specification change and design change.